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ischeduling_configuration.h
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1 //*****************************************************************************
2 // Copyright 1986, 2016 NVIDIA Corporation. All rights reserved.
3 //*****************************************************************************
6 //*****************************************************************************
7 
8 #ifndef MI_NEURAYLIB_ISCHEDULING_CONFIGURATION_H
9 #define MI_NEURAYLIB_ISCHEDULING_CONFIGURATION_H
10 
11 #include <mi/base/interface_declare.h>
12 
13 namespace mi {
14 
15 namespace neuraylib {
16 
21 class IScheduling_configuration : public
23  mi::base::Interface_declare<0x4f1fe336,0x111a,0x44c3,0xb2,0x95,0xa3,0x30,0xf0,0xb6,0xc2,0x05>
24 {
25 public:
42  virtual Sint32 set_cpu_load_limit( Float32 limit) = 0;
43 
47  virtual Float32 get_cpu_load_limit() const = 0;
48 
65  virtual Sint32 set_gpu_load_limit( Float32 limit) = 0;
66 
70  virtual Float32 get_gpu_load_limit() const = 0;
71 
81  virtual Sint32 set_accept_delegations( bool value) = 0;
82 
88  virtual bool get_accept_delegations() const = 0;
89 
99  virtual Sint32 set_work_delegation_enabled( bool value) = 0;
100 
106  virtual bool get_work_delegation_enabled() const = 0;
107 
122  virtual Sint32 set_gpu_work_delegation_enabled( bool value) = 0;
123 
133  virtual bool get_gpu_work_delegation_enabled() const = 0;
134 
156  virtual Sint32 set_thread_affinity_enabled( bool value) = 0;
157 
161  virtual bool get_thread_affinity_enabled() const = 0;
162 };
163  // end group mi_neuray_configuration
165 
166 } // namespace neuraylib
167 
168 } // namespace mi
169 
170 #endif // MI_NEURAYLIB_ISCHEDULING_CONFIGURATION_H